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international rectifier ? 233 kansas street , el se g undo , ca 90245 usa r r e e f f e e r r e e n n c c e e d d e e s s i i g g n n IRDCIP1206-B IRDCIP1206-B: 300 khz, du al output, synchronous buck converter using ip1206 overview this reference design is capable of deli vering a continuous current of 30a; (i.e. 15a max. per output channel) at an ambient temperature of 45oc and with 200lfm of airflow. figures 1C24 provide performance graphs, thermal images, and waveforms. figures 25C35, and table 1 are provided to engineers as design references for implementing an ip1206 solution. the components installed on this demoboard were selected based on operation at an input voltage of 12v and at a switching frequency of 300 khz. changes from these set points may require optimizing the control loop and/or adjusting the values of input/output filters in order to meet the users specific application requirements. refer to the ip1206 datasheet user design guidelines section for more information. note: the 16-pin connector (con1) is used only for production test purposes and should not be used for evaluation of this demoboard. demoboard quick start guide initial settings: vout 1 is set to 2.5v, but can be adjusted from 0.8v to 5.5v by changing the values of r5 and r6 according to the follo wing formula: r5 = r6 = (10.0k * 0.8) / (vout - 0.8) vout 2 is set to 1.5v, but can be adjusted from 0.8v to 5.5v by changing the values of r5 and r6 according to the follo wing formula: r15 = r16 = (10.0k * 0.8) / (vout - 0.8) the switching frequency is set to 300 khz, but can be adjusted by changing the value of r t . the graph in figure 26 shows the relationship between r t and the switching frequency. power up procedure: 1. apply input voltage across vin and pgnd. 2. apply load across vout 1 pads and pgnd pads and across vout 2 pads and pgnd pads 3. adjust load to desired level. see recommendations below. simultaneous and ratiometric startup and shutdown: refer to the ip1206pbf datasheet for instructions on using the IRDCIP1206-B board outputs in either ratiometric or si multaneous operation mode. downloaded from: http:///
IRDCIP1206-B_______ _____ www.irf.com 2 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 0123456789101112131415 current(a) power loss (w) 70% 75% 80% 85% 90% 95% 01234567891011121 31415 current(a) efficiency IRDCIP1206-B recommended operating conditions (refer to the ip1206 datasheet for maximum operating conditions) input voltage: 7.5v C 14.5v output voltage ( vout 1, vout 2 ) 0.8 C 5.5v switching freq: 300khz output current: this reference design is capable of delivering a continuous current of 30a (15a per output channel) at an ambient temperature of 45oc with 200lfm of airflow (without heatsink). fig. 2: total system efficiency vs. output current per phase fig. 1: total system power loss vs. output current per phase downloaded from: http:///
____________ __IRDCIP1206-B www.irf.com 3 fc=75khz pm=57 o gm=10db fc=75khz pm=57 o gm=10db 99.25% 99.50% 99.75% 100.00% 100.25% 100.50% 100.75% 0 1 2 3 4 5 6 7 8 9 101112131415 output current (a) output regulation wrt 0a vo1 vo2 fig. 3: output voltage regulation vs. current fig. 4: bode plot of vo1 (2.5v) vin = 12v vo1 = 2.5v iout1 = 15a fsw = 300khz no airflow downloaded from: http:///
IRDCIP1206-B_______ _____ www.irf.com 4 fc=45khz pm=54 o gm=16db fc=45khz pm=54 o gm=16db fig. 5: bode plot of vo2 (1.5v) fig. 6: thermograph (no heatsink) conditions: vin = 12v vout1 = 2.5v vout2 = 1.5v iout1 = iout2 = 15a fsw = 300khz ambient temp. = 45oc airflow = 200lfm stabilizing time = 15 min vin = 12v vo2 = 1.5v iout2 = 15a fsw = 300khz no airflow downloaded from: http:///
____________ __IRDCIP1206-B www.irf.com 5 fig.7: vo1 power up sequence fig. 8: vo1 power down sequence vin = 12v vo1 = 2.5v iout = 15a fsw = 300khz no airflo w vin = 12v vo1 = 2.5v iout = 15a fsw = 300khz no airflow downloaded from: http:///
IRDCIP1206-B_______ _____ www.irf.com 6 fig.9: vo2 power up sequence fig.10: vo2 power down sequence vin = 12v vo2 = 1.5v iout = 15a fsw = 300khz no airflow vin = 12v vo2 = 1.5v iout = 15a fsw = 300khz no airflow downloaded from: http:///
____________ __IRDCIP1206-B www.irf.com 7 fig. 11: power down when enable is pulled low fig. 12: switch node waveforms vin = 12v vo1 = 2.5v vo2 = 1.5v iout1 = 15a = iout2 fsw = 300khz vin = 12v vo1 = 2.5v vo2 = 1.5v iout1 = 15a = iout2 fsw = 300khz downloaded from: http:///
IRDCIP1206-B_______ _____ www.irf.com 8 fig. 13: over voltage protection fig. 14: short circuit protection vin = 12v vo = 2.5v iout = 15a fsw = 300khz no airflow vin = 12v vo = 2.5v iout = 15a fsw = 300khz no airflow downloaded from: http:///
____________ __IRDCIP1206-B www.irf.com 9 fig. 15: i out1 transient step-up 50% - 75% fig. 16: i out1 transient step-down 75% - 50% fig. 17: i out1 transient step-up 50% - 100% fig. 18: i out1 transient step-down 100% - 50% vin = 12v vo1 = 2.5v iout = 15a fsw = 300khz no airflow vin = 12v vo1 = 2.5v iout = 15a fsw = 300khz no airflow vin = 12v vo1 = 2.5v iout = 15a fsw = 300khz no airflow vin = 12v vo1 = 2.5v iout = 15a fsw = 300khz no airflow 51mv 43mv 80mv 71mv downloaded from: http:///
IRDCIP1206-B_______ _____ www.irf.com 10 fig. 19: i out2 transient step-up 50% - 75% fig. 20: i out2 transient step-down 75% - 50% fig. 21: i out2 transient step-up 50% - 100% fig. 22: i out2 transient step-down 100% - 50% vin = 12v vo1 = 1.5v iout = 15a fsw = 300khz no airflow vin = 12v vo1 = 1.5v iout = 15a fsw = 300khz no airflow vin = 12v vo1 = 1.5v iout = 15a fsw = 300khz no airflow vin = 12v vo1 = 1.5v iout = 15a fsw = 300khz no airflow 42mv 34mv 72mv 42mv downloaded from: http:///
____________ __IRDCIP1206-B www.irf.com 11 fig. 23 ratiometric startup a nd shutdown of vo1 and vo2 fig. 24 simultaneous startup and shutdown of vo1 and vo2 downloaded from: http:///
IRDCIP1206-B_______ _____ www.irf.com 12 adjusting the over-current limit rocx is the resistor used to adjust the over-current trip point. the trip point corresponds to the peak inductor current indic ated on the x-axis of fig. 21. (note: the trip point will be higher than expecte d if the reference board is cool and is being used for short circuit testing.) fig. 25: r ocset vs. over-current trip point fig. 26: r t vs. frequency switching frequency vs. rt 0 100 200 300 400 500 600 700 0 1 02 03 04 05 06 07 0 rt ( ko h m ) fsw (khz) 1 2 3 4 5 6 7 8 9 10 11 12 13 56789101112131415161718192021222324252627282930 peak inductor current (a) current limit resistor (kohms) downloaded from: http:///
____________ __IRDCIP1206-B www.irf.com 13 fig. 27: component placement top layer fig. 28: component placement bottom layer fig. 29: top copper layer fig. 30: 1 st mid copper layer downloaded from: http:///
IRDCIP1206-B_______ _____ www.irf.com 14 fig. 31: 2 nd mid copper layer fig. 32: 3 rd mid copper layer fig. 33: 4 th mid copper layer fig. 34: bottom copper layer downloaded from: http:///
____________ __IRDCIP1206-B www.irf.com 15 c22 0.1uf c19 1uf c5 10uf 16v c14 15pf c26 4700pf r7 10k r13 10k r12 221 r5 4.64k r14 30.9k(300khz) tp5 sync r8 10k c23 1000pf roc2 5.76k pgd1 ss1 vref vin rt fb1 cc1 fb1s l2 1.0uh c9 100uf c10 100uf c11 100uf vout1 tp1 +12v c21 0.1uf seq c6 10uf 16v c1 10uf 16v c2 10uf 16v c3 10uf 16v c4 10uf 16v vin1 16 vin2 3 vsw1 14 vsw2 5 agnd 36 pgnd 4 pgnd 6 pgnd 13 pgnd 15 ss1 17 cc1 18 fb1 19 fb1s 20 seq 21 sync 22 pgd2 23 vp1 24 vp2 25 vref 26 pgd1 27 vcc 28 vo3 29 trk 30 enable 31 dh_ on 32 rt 33 fb2s 34 fb2 35 cc2 1 ss2 2 vcb1 12 oc1 11 vcl 10 vch 9 oc2 8 vcb2 7 u1 ip1206 c25 100pf c15 15pf r9 10k l1 1.0uh roc1 5.76k r6 4.64k c20 100pf fb2 oc1 oc2 ss2 pgd2 r4 0 vo3 en cc2 sync vcb1 c28 0.1uf vcb2 vsw1 vsw2 c16 1uf c17 1uf c18 0.1uf fb2s c12 10uf 2.5v c13 10uf tp6 1.2v_en r3 100k r1 100k tp3 vout1 r17 0 c30 680uf j1 vin j2 pgnd vin j3 vout1 j4 pgnd 1 3 5 7 9 11 13 15 2 4 6 8 10 12 14 16 con1 smt16_connector vins pgnds vsw1 ss1 vout1 vout2 c7 10uf 16v c8 10uf 16v r18 0 vcc r2 0 vcc_vin r20 1.43k r19 10k tp7 ss1 tp8 pgd1 tp2 pgnd tp4 pgnd r21 0 r22 open vch trk c32 1uf c31 1uf tp9 pgd2 r24 0 tp10 seq tp11 ss2 c33 0.1uf r23 open r25 open vout2 tp12 trk c29 4700pf r26 221 r15 11.5k r10 10k c24 1000pf c34 100uf c35 100uf c36 100uf vout2 c27 100pf r11 10k r16 11.5k c37 10uf c38 10uf r27 0 1.5v tp13 vout2 j5 vout2 j6 pgnd tp14 pgnd vdds pgnds vsw2 ss2 n c fig. 35: schematic of the reference design downloaded from: http:///
IRDCIP1206-B_______ _____ www.irf.com 16 table 1: bill of materials for the reference design downloaded from: http:///
____________ __IRDCIP1206-B www.irf.com 17 refer to the following application notes for detailed guidelines and suggestions when implementing ipowir technology products: an-1028: recommended design, integration and re work guidelines for international rectifiers ipowir technology bga and lga and packages this paper discusses optimization of the layout design for mounting ipowir bga and lga packages on printed circuit boards, accounting for thermal and elec trical performance and assembly considerations. topics discussed includes pcb layout placement, and via interconnect suggestions, as well as soldering, pick and place, reflow, inspection, cleaning and reworking recommendations. an-1030: applying ipowir products in your thermal environment this paper explains how to use the power loss and soa curves in the data sheet to validate if the operating conditions and thermal environment are within the safe operating area of the ipowir product. an-1047: graphical solution for two branch heatsinking safe operating area detailed explanation of the dual axis soa graph and how it is derived. use of this design for any application should be fully verified by the customer. international rectifier cannot guarantee suitability for your applications, and is not liable for any result of usage for such applications including, without limitation, personal or property damage or violation of third party intellectual property rights. ir world headquarters: 233 kansas st., el segundo, californi a 90245, usa te l: (310) 252-7105 tac fax: (310) 252-7903 downloaded from: http:///

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